Silicon Labs /EFR32MG21B020F1024IM32 /RAC_S /RXENSRCEN

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RXENSRCEN

31282724232019161512118743000000000000000000000000000000000000000000SWRXEN0 (CHANNELBUSYEN)CHANNELBUSYEN0 (TIMDETEN)TIMDETEN0 (PREDETEN)PREDETEN0 (FRAMEDETEN)FRAMEDETEN0 (DEMODRXREQEN)DEMODRXREQEN0 (PRSRXEN)PRSRXEN

Description

No Description

Fields

SWRXEN

SW RX Enable

CHANNELBUSYEN

Channel Busy Enable

TIMDETEN

Timing Detected Enable

PREDETEN

Preamble Detected Enable

FRAMEDETEN

Frame Detected Enable

DEMODRXREQEN

DEMOD RX Request Enable

PRSRXEN

PRS RX Enable

Links

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